Name :
Keshav K
Subtitle :
VLSI Design and Verification ASIC FPGA CPLD Verilog, VHDL, SV
Location :
Bangalore, India
Number reviews :
12
Number projects :
2
Rate billing :
16.67
Rate currency :
$
Service :
Skill :
Perl
.
Keshav k from
Bangalore, India
is interested in VLSI Design and Verification ASIC FPGA CPLD Verilog, VHDL, SV. Keshav k is working as a Freelancer and can be found in many freelancing marketplace. Keshav k provides freelancing service
Websites, IT & Software. Keshav k very Skilled with
Perl.
Keshav k so far completed 2 projects and has about 12 reviews from clients who has used earlier freelancing projects. Keshav k hourly rate is $16.67/hr and gets paid in $.
Please follow this link to hire directly.
Keshav k so far completed 2 projects and has about 12 reviews from clients who has used earlier freelancing projects. Keshav k hourly rate is $16.67/hr and gets paid in $.
Please follow this link to hire directly.
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