
Name :
Jithinsankar
Subtitle :
PLC & SCADA Programmers, Scientific Research Researcher & Verilog / VHDL Designer
Location :
Perth, Australia
Number projects :
0
Rate currency :
$
Service :
Skill :
Jithinsankar from Perth, Australia is interested in PLC & SCADA Programmers, Scientific Research Researcher & Verilog / VHDL Designer. Jithinsankar is working as a Freelancer and can be found in many freelancing marketplace. Jithinsankar provides freelancing service
Engineering & Science and Websites, IT & Software. Jithinsankar very Skilled with
Electrical Engineering, Electronics, Engineering, Mechatronics, Perl and Scientific Research.
Jithinsankar so far completed 0 projects and has about 0 reviews from clients who has used earlier freelancing projects. Jithinsankar hourly rate is Ask for Hourly Rate and gets paid in $.
Please follow this link to hire directly.
Jithinsankar so far completed 0 projects and has about 0 reviews from clients who has used earlier freelancing projects. Jithinsankar hourly rate is Ask for Hourly Rate and gets paid in $.
Please follow this link to hire directly.
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