
Name :
rex2012
Subtitle :
Verilog / VHDL Designer, Scientific Research Researcher & PCB Layout Designer
Location :
jiaxing, China
Number projects :
0
Rate currency :
$
Service :
Skill :
Rex2012 from jiaxing, China is interested in Verilog / VHDL Designer, Scientific Research Researcher & PCB Layout Designer. Rex2012 is working as a Freelancer and can be found in many freelancing marketplace. Rex2012 provides freelancing service
Websites, IT & Software and Engineering & Science. Rex2012 very Skilled with
C Programming, PCB Layout and Scientific Research.
Rex2012 so far completed 0 projects and has about 0 reviews from clients who has used earlier freelancing projects. Rex2012 hourly rate is $15.00 USD and gets paid in $.
Please follow this link to hire directly.
Rex2012 so far completed 0 projects and has about 0 reviews from clients who has used earlier freelancing projects. Rex2012 hourly rate is $15.00 USD and gets paid in $.
Please follow this link to hire directly.
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